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fix(arch): fix riscv64 CPU num from fdt parse

Heinz 8 mesi fa
parent
commit
42b4d5c683
2 ha cambiato i file con 12 aggiunte e 17 eliminazioni
  1. 4 14
      arch/src/riscv64/fdt.rs
  2. 8 3
      arch/src/riscv64/init.rs

+ 4 - 14
arch/src/riscv64/fdt.rs

@@ -89,21 +89,11 @@ pub fn get_num_harts(dtb_addr: usize) -> usize {
         fdt::Fdt::from_ptr(dtb_addr as *const u8)
             .expect("Failed to parse device tree from dtb_addr")
     };
+    let dtb_cpus = fdt.cpus();
     let mut num_harts = 0;
-    if let Some(cpus_node) = fdt.find_node("/cpus") {
-        for cpu_node in cpus_node.children() {
-            if let Some(compatible_prop) = cpu_node
-                .properties()
-                .find(|p| p.name == "compatible")
-            {
-                if let Some(s) = compatible_prop.as_str() {
-                    if s.starts_with("riscv,") {
-                        // 找到一个 RISC-V CPU 节点,增加计数。
-                        num_harts += 1;
-                    }
-                }
-            }
-        }
+
+    for _cpu in dtb_cpus {
+        num_harts += 1;
     }
     num_harts
 }

+ 8 - 3
arch/src/riscv64/init.rs

@@ -1,7 +1,12 @@
 use core::pin::Pin;
-use riscv::{asm::sfence_vma_all, register::{
-    mhartid, sscratch, sstatus, stvec::{self, Stvec}
-}};
+use riscv::{
+    asm::sfence_vma_all, register::{
+        mhartid,
+        sscratch,
+        sstatus,
+        stvec::{self, Stvec}
+    }
+};
 use sbi::PhysicalAddress;
 
 /// TODO: