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@@ -18,7 +18,7 @@ static LOCAL_CPU: LazyLock<CPU> = LazyLock::new(CPU::new);
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use super::{
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config::smp::get_num_harts,
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mm::setup_kernel_satp,
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- trap::setup_kernel_trap,
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+ trap::setup_trap,
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interrupt::InterruptControl
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};
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@@ -42,7 +42,7 @@ impl UserTLS {
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impl CPU {
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pub fn new() -> Self {
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- let hart_id = read_hart_id();
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+ let hart_id = 0;
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Self {
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hart_id: hart_id,
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interrupt: InterruptControl::new(hart_id),
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@@ -54,12 +54,13 @@ impl CPU {
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/// # Safety
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/// This function performs low-level hardware initialization and should
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/// only be called once per Hart during its boot sequence.
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- pub unsafe fn init(self: Pin<&mut Self>) {
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+ pub unsafe fn init(self: Pin<&mut Self>, hart_id: usize) {
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let self_mut = self.get_unchecked_mut();
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+ self_mut.hart_id = hart_id;
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sscratch::write(self_mut.hart_id as usize);
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- setup_kernel_trap();
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+ setup_trap();
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// CLINT, 10_000 ms
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self_mut.interrupt.setup_timer(10_000);
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@@ -88,7 +89,10 @@ impl CPU {
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let ap_entry_point = PhysicalAddress::new(ap_boot_entry as usize);
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- for i in 1..total_harts {
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+ for i in 0..total_harts {
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+ if i == self.hart_id {
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+ continue;
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+ }
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sbi::hsm::hart_start(i, ap_entry_point, 0)
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.expect("Failed to start secondary hart via SBI");
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}
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@@ -98,7 +102,7 @@ impl CPU {
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sscratch::write(sp as usize);
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}
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- pub fn set_tls32(self: Pin<&mut Self>, user_tls: &UserTLS) {
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+ pub fn set_tls32(self: Pin<&mut Self>, _user_tls: &UserTLS) {
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// nothing
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}
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@@ -118,16 +122,11 @@ impl CPU {
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}
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}
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-
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pub fn cpuid(&self) -> usize {
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self.hart_id
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}
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}
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-fn read_hart_id() -> usize {
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- mhartid::read()
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-}
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-
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#[macro_export]
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macro_rules! define_smp_bootstrap {
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($cpu_count:literal, $ap_entry:ident, $alloc_kstack:tt) => {
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