change hal riscv64 config and fdt implementation

crates/eonix_hal/Cargo.toml

@@ -16,3 +16,12 @@ eonix_preempt = { path = "../eonix_preempt" }
 
 acpi = "5.2.0"
 cfg-if = "1.0"
+
+[target.'cfg(target_arch = "riscv64")'.dependencies]
+intrusive_list = { path = "../intrusive_list" }
+buddy_allocator = { path = "../buddy_allocator" }
+sbi = "0.3.0"
+riscv = { version = "0.13.0", features = ["s-mode"] }
+spin = "0.10.0"
+fdt = "0.1"
+bitflags = "2.6.0"

crates/eonix_hal/src/arch/riscv64/config.rs

@@ -8,8 +8,8 @@ pub mod mm {
     pub const KIMAGE_VIRT_BASE: usize = KIMAGE_OFFSET + KIMAGE_PHYS_BASE;
     pub const PAGE_SIZE: usize = 1 << PAGE_SIZE_BITS;
     pub const PAGE_SIZE_BITS: usize = 12;
-    // 127GB
-    pub const MEMORY_SIZE: usize = 0x1F_C000_0000;
+    // 128GB
+    pub const MEMORY_SIZE: usize = 0x20_0000_0000;
 
     pub const PTE_SIZE: usize = 8;
     pub const PTES_PER_PAGE: usize = PAGE_SIZE / PTE_SIZE;

crates/eonix_hal/src/arch/riscv64/fdt.rs

@@ -5,10 +5,12 @@ use alloc::string::String;
 use fdt::Fdt;
 use spin::Once;
 
+use crate::arch::riscv64::config::mm::KIMAGE_OFFSET;
+
 static GLOBAL_FDT: Once<Fdt<'static>> = Once::new();
 
 pub unsafe fn init_dtb_and_fdt(dtb_pa: usize) {
-    let dtb_virt_ptr = dtb_pa as *const u8;
+    let dtb_virt_ptr = (dtb_pa + KIMAGE_OFFSET) as *const u8;
 
     GLOBAL_FDT.call_once(|| {
         unsafe { Fdt::from_ptr(dtb_virt_ptr)