Commit History

作者 SHA1 備註 提交日期
  greatbridf b1fb9dea12 fix(timer): riscv64 should have timer frequency 1000Hz 7 月之前
  Heinz 7280c46efb feat(hal): add timer interrupt enable 7 月之前
  greatbridf 4351cf5573 partial work: fix riscv64 bootstrap 7 月之前
  Heinz 56a357bdd0 change hal riscv64 config and fdt implementation 7 月之前
  Heinz 601c879103 feat(hal): add riscv64's Sv39 page mode 8 月之前